![]() In it's yearly Form 10-K document about Intel's financials the company now really makes note of a three-step cycle. Examples: Haswell (22nm Tock, LGA-2011, high-end), Broadwell (14nm Tick, LGA-1150, mainstream) and Skylake (14nm Tock, LGA-1150, mainstream). Roughly every year to 18 months, there was expected to be one tick or tock. Now if this sounds like gibberish to you allow me to explain every "tick" represents a shrinked process technology based on the previous micro-architecture (sometimes introducing new things like instructions, as with Broadwell, released in late 2014) and every "tock" designates a new micro-architecture. Based on Moore's Law this been proven to become more and more difficult, it's becoming Tick-Tock-TockĮarlier this year we already reported that starting with Kaby Lake things would to be changing as the cycle changes towards two tocks. In just six months, we will see is Intel going to stay the dominant processor manufacturer (in terms of ultimate performance), or not.The familiar "Tick-Tock" is a model used by chip manufacturer Intel Corporation start started in 2007 to follow every micro-architectural change with a die shrink of the process technology. And at the end of the day, that is what matters. Still, the performance delivered by these processors was the best money could buy. All in all, Intel knows what they need to finance the development and deployment of new process nodes, for which you have to keep the current processes paid off. There’s also the case of mobile architectures, which are also using 2-3 generations per process node. After all, Broadwell-E slipped from Q4 2015 into Q2 2016, and that’s already six months, or two quarters off. With the new schedule, Intel is stretching its manufacturing process to three generations, or three to four years. That will be followed by the first 10nm process Tock, codenamed Cannonlake (CNL).Īll in all, while Tick-Tock cadence enabled Intel to dominate the market, regular slippages in the roadmap showed how difficult was to keep the cadence going. new architecture Skylake (SKL), and Tick+ – Kaby Lake (KBL), i.e. Skylake also clocked almost 17% higher than Broadwell.Īs you can see on the slide above, in the current 14nm, we have 14nm Tock called Broadwell (BDL), Tick i.e. With 60% of the die dedicated to graphics, Skylake is a true Accelerated Processing Unit (APU), or Heterogeneous Processing Unit. Thus, Skylake showed up with a top to bottom architectural optimizations, both on the CPU and GPU side. Sadly, Broadwell did not show a lot of clocking headroom, and the peak clock for the top-end part peaked at 3.3 GHz, 200MHz slower than Haswell-based Core i7 4770K. The decision to include VRM circuitry into Haswell resulted in a lot of issues for Broadwell, and in the end the company ditched VRM circuitry for both Broadwell and Skylake. Intel ran into issues with both 14nm process and internal architecture of Haswell. Haswell was the new architecture that used the 22nm process but Broadwell was not a 14nm die-shrink of the said architecture. The off-cadence culminated with Haswell-Broadwell-Skylake. Ivy Bridge was the first processor from Intel that we could call APU, instead of a CPU – as 40% of the die was allocated for new graphics architecture. ![]() After a decade of manufacturing processors in an bi-annual cycle (Tick – new architecture, old process Tock – new process and ‘old’ architecture), Intel’s SEC 10-K filing (PDF download) officially killed the Tick-Tock cadence, moving to a three-fold product line-up for a single manufacturing process.Īpproximately four years ago, Tick-Tock encountered a first significant hiccup with Ivy Bridge being a 22nm version of Sandy Bridge. Several months ago, we exclusively disclosed the new architectural cadence for Intel processors. ![]()
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